1. Field of the Invention
The disclosed embodiments of the present invention relate to electrostatic discharge (ESD) protection, and more particularly, to an ESD protection structure utilizing a floor plan design of a conductive layer to protect a core circuit of an integrated circuit from an ESD event, and related integrated circuit and ESD protection method.
2. Description of the Prior Art
In order to prevent a core circuit of an integrated circuit from being damaged due to an electrostatic discharge (ESD) current, the integrated circuit has a clamp circuit disposed therein to clamp the ESD current. However, once the ESD current flows into the core circuit before flowing into the clamp circuit, the integrated circuit cannot avoid ESD damage to the core circuit. Thus, there is a need for a novel ESD protection mechanism to improve ESD protection.